The semiconductor integrated circuit (IC) industry has experienced rapid growth. Technological advances in IC materials and design have produced generations of ICs where each generation has smaller and more complex circuits than the previous generation. However, these advances have increased the complexity of processing and manufacturing ICs. In the course of integrated circuit evolution, functional density (i.e., the number of interconnected devices per chip area) has generally increased while geometry size (i.e., the smallest component that can be created using a fabrication process) has decreased. This scaling down process generally provides benefits by increasing production efficiency and lowering associated costs.
As a part of the IC fabrication process, wafers may undergo inspection to identify potential defects. Typically, such inspection may be done using an optical machine such as tools developed by KLA-Tencor. However, these inspections may identify a huge number of potential defects. To verify whether these potential defects are systematic defects, a scanning electron microscope (SEM) tool may be used. However, the SEM tools can only review a very small portion of the wafer at a time. In other words, the SEM review is a time-consuming process. Generally, it is simply not practical to do a full SEM review of a whole wafer. As a result, there is a risk that some systematic defects will not be caught.
Consequently, although existing techniques for identifying systematic defects on a wafer have been generally adequate for their intended purposes, they have not been entirely satisfactory in all respects.